Overview
Role involves architecting, implementing, verifying, and productizing custom hardware designs.
Ideal candidate has 3+ years of formal verification experience and expertise in SystemVerilog Assertions.
hybridmidpermanentfull-timeEnglishPython
Locations
Requirements
Degree in Electrical or Computer Engineering 3+ years in formal verification Experience with formal verification tools Expertise in SystemVerilog Assertions Experience with RTL design Understanding of compute architecture
Responsibilities
Drive formal verification efforts Develop and execute verification plans Collaborate with hardware designers Analyze and debug verification results Contribute to verification methodologies Stay updated with advancements in formal methods
Benefits