Overview
Senior SLT Engineer responsible for post-silicon validation and debug workflows.
Ideal candidate has experience in silicon validation and strong problem-solving skills.
100k usd / yearhybridmid
Locations
United States, Texas, Austin United States, Colorado, Fort Collins United States, California, Santa Clara
Requirements
Experience in silicon bring-up Familiar with chip design Strong scripting or programming skills
Responsibilities
Own post-silicon validation workflows Define and execute SLT strategies Validate silicon across SerDes IOs
Benefits
Highly competitive compensation package