Emulation/Post-Si Validation Engineer

Overview

Role involves designing and developing emulation infrastructure for high-performance CPUs.

Ideal candidate should have a strong technical background with experience in hardware verification and emulation.

Locations

• United States, Texas, Austin
• United States, California, Santa Clara

Requirements

• Degree required
• At least 3 years of experience
• Emulator experience required
• Programming in Verilog or System Verilog required

Responsibilities

• Develop emulation infrastructure
• Build and deploy emulation testbench components
• Create emulation focused test plans
• Improve emulation performance
• Create flows for large scale regressions

Benefits

• competitive compensation package